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I need a clarification of a practice problem of Computer Systems A Programmer’s Perspective Third edition.

The problem is on page 218 of chapter 3: Practice problem 3.1:

Assume the following values are stored at the indicated memory addresses and registers:

Address     value      register     value
 0x100      0xFF       %rax         0x100
 0x104      0xAB       %rcx         0x1
 0x108      0x13       %rdx         0x3
 0x10C      0x11

Question:

Fill in the following table showing the values for the indicated operands:

Operand          Value
%rax
0x104
$0x108
(%rax)
4(%rax)
9(%rax,%rdx)
260(%rcx,%rdx)
0xFC(,%rcx,4)
(%rax,%rdx,4)

Answer is:

Operand           Value Comment
%rax              0x100  Register
0x104             0xAB   Absolute address
$0x108            0x108  Immediate
(%rax)            0xFF   Address 0x100
4(%rax)           0xAB   Address 0x104
9(%rax,%rdx)      0x11   Address 0x10C
260(%rcx,%rdx)    0x13   Address 0x108
0xFC(,%rcx,4)     0xFF   Address 0x100
(%rax,%rdx,4)     0x11   Address 0x10C

The answer is not clear to me. From where it get the values for the operands?

Any clarification would help me to understand it better.

Peter Cordes
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Encipher
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  • If you've worked with C, the first couple of operands are similar to pointers. For each of the first 4 operands, the question is are we printing the address stored in the pointer, the value that the pointer points to or the value stored in a variable (in this case, a memory location). For example, if the register is a pointer, then for the first, `%rax` is asking what is the address stored in the pointer (it is 0x100). Think of that analogy for the next few examples to get you started. – wxz Feb 15 '22 at 16:33
  • This exercise is to ensure you understand the types of addressing modes (register, immediate, and absolute), along with their correlating prefix notation (%, $, ...) – Jeff Feb 15 '22 at 16:41
  • The operands are just addressing modes, these are described in the intel or AMD manuals. That said these are [in AT&T](https://csiflabs.cs.ucdavis.edu/~ssdavis/50/att-syntax.htm) and not Intel syntax – Mgetz Feb 15 '22 at 16:41
  • Is this from CS:APP 3e *global edition*? If so, the practice problems were replaced (by the publisher) with broken crap. See [CS:APP example uses idivq with two operands?](https://stackoverflow.com/q/57998998) for details. As Erik pointed out, the operand-sizes aren't specified by the addressing mode alone, and nothing seems to rule out LEA. – Peter Cordes Feb 15 '22 at 22:47

1 Answers1

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The practice problem would be improved by stating complete CPU instructions up front.  The processor only runs complete instructions: it never has to run an addressing mode without the context of a complete instruction, which will include an opcode and operand specifiers.

Without the complete instruction, operand sizes are not specified (though here generally appear intended as 32 bit), and an lea opcode, where possible, instead of mov would produce vastly different results.  The processor can use addressing modes as targets as well as for sources, but targets write to memory rather than reading from memory — yet as far as we are told we don't know whether the addressing mode is for read or write.

So, there is plenty of room for improvement in the practice problem, by not abstracting a complete instruction down to one addressing mode operand (or else by making other things we will have to assume more explicit).


With the exception of the first (because %rax is 64 bits) imagine that each of these other addressing modes appears as if in a mov instruction as follows:

For example, given 260(%rcx,%rdx) imagine it as this: mov 260(%rcx,%rdx), %edi — and that the question is, what value appears in %edi after each such mov instruction.

The values of certain registers are given, as are the values of the certain memory locations.  So, what you need to do is be the computer running each such mov instruction, and reporting what value appears in %edi after.

So, mov 260(%rcx,%rdx), %edi says take 26010 which is also 10416 aka 0x104 and add that to the value held in %rcx, which is given as 1, and also to the value held in %rdx, which is given as 3, to form the effective address, here then, 0x104+1+3 = 0x108.  Now use that effective address to load a 32 bit value from that memory location, address 0x108, whose value is given as 0x13.

With a complete instruction, as I've shown, you should be able to consult an instruction set manual to see how it will execute, and derive answers given that execution and the given values in the practice problem table.

Erik Eidt
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  • I wonder if this is from CS:APP 3e *global edition*? If so, the practice problems were replaced (by the publisher) with broken / fake code, and probably also poorly written stuff like this. That could explain the implicit assumptions of dword or byte operand-size, and that it's not LEA. See [CS:APP example uses idivq with two operands?](https://stackoverflow.com/q/57998998) for details. – Peter Cordes Feb 15 '22 at 22:50
  • Yes it is CS:APP global edition. – Encipher Feb 16 '22 at 04:43