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I'm learning asm and I'm curious why the names for registers are designated with these letters, as understanding this might help me understand it on another level. I.e. AL is the least significant byte, but what does "L" mean?

Image source: http://www.cs.virginia.edu/~evans/cs216/guides/x86.html

registers

kfrz
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    `x` - extended, `h` - high byte, `l` - low byte. In the beginning `(a, b, c, d)` - 8-bit processors, and another `byte` for 16-bit processors `(al, ah, bl, bh, ...)`, extended another `word`, e.g. `(ax, bx, ...)` to 32-bit processors for registers `(eax, ebx, ...)` add another `double-word` 32-bit extension for 64-bit processors `(rax, rbx, ...)` Time marches on... – David C. Rankin Feb 11 '18 at 08:32
  • Thanks, this answers my question quite clearly – kfrz Feb 11 '18 at 08:38
  • [Art of Assembly Programming (especially Chaps 1-4)](https://www.ic.unicamp.br/~pannain/mc404/aulas/pdfs/Art%20Of%20Intel%20x86%20Assembly.pdf) – David C. Rankin Feb 11 '18 at 08:38
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    related: [Why are first four x86 GPRs named in such unintuitive order?](https://retrocomputing.stackexchange.com/questions/5121/why-are-first-four-x86-gprs-named-in-such-unintuitive-order), and [What do the register-names like esi mean, and what special purposes do they have.](http://www.swansontec.com/sregisters.html). Of course, when optimizing for performance, not code-size, instructions like `rep scas` aren't always best, so you should pick whatever registers are most convenient (fewest / cheapest instructions) without caring a lot about their names unless the choice is arbitrary. – Peter Cordes Feb 11 '18 at 08:41
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    By using the similar patterns of register usage may help with compression of code, for example when you are working on 4kB intro, it's sometimes better to use few more `push/pop/mov` instructions to use f.e. `esi` as "source" address everywhere, having like +40B after assembling (than version using spare registers and saving `push/pop` pairs), but less bytes after compression. But this advice is only size-limit-intro coding related, not for "production" SW. And it reads tiny bit better during review, if you use registers in common patterns = advantage even for serious SW (but why asm then?). – Ped7g Feb 11 '18 at 09:49
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    a lot of related and duplicate questions: [Why are x86 registers named the way they are?](https://stackoverflow.com/q/892928/995714), [What does X mean in EAX,EBX...?](https://stackoverflow.com/q/2545192/995714), [What do the E and R prefixes stand fors?](https://stackoverflow.com/q/43933379/995714), [x86 register name history](https://stackoverflow.com/a/5125854/995714) – phuclv Feb 11 '18 at 09:53
  • Another SO resource is [How to know if a register is a “general purpose register”?](https://stackoverflow.com/a/45538667/1305969). – zx485 Feb 11 '18 at 17:44
  • @LưuVĩnhPhúc: The question as written is an exact duplicate of your 2nd link, because one of the answers there answers the H / L part, too. – Peter Cordes Feb 12 '18 at 01:20

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When what began as the "A" (accumulator) evolved to 16 bits AX there was still a need to identify the Low order (7-0) and High order (15-8) bits. Hence AL & AH. The connotation of low and high had been around for quite awhile, so it's probably for that reason it was adopted, but it could as just as easily been ah = AL = Left 8 bits and al = AR = right 8 bits.

Then when you get into 64 bit, these naming conventions are basically pseudonyms and registers are identified R0 - R15. So R2B is CL, R2W becomes CX on so on.

Shift_Left
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    Because of the strange way registers are numbered, CL is R1B and BL is R3B. – prl Feb 11 '18 at 20:29
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    @prl I should have remembered that most documentation does not represent registers in their encoded order. AX = R0W, CX = R1W, DX = R2W, BX = R3W, SP = R4W, BP = R5W, SI = R6W and DI = R7W. For some reason and even in Intel's documentation it most often AX, BX, CX, DX, SI, DI, SP and BP. – Shift_Left Feb 11 '18 at 21:38