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In the 16-bit Intel processors (8086, etc...) the registers SP, BP, SI, DI were 16-bit registers and could only be addressed as 16-bit registers.

32-bit processors have extended this registers to 32-bits (referred as ESI, EDI, ESP, EBP) and these registers could be used as 16-bit registers for backward compatibility.

Few resources state that these registers are now byte addressable (as SIL, DIL, SPL, BPL) in the 64-bit Intel processors and few resources doesn't. I'm confused!

Is this an added feature along with the addition of R8-R15 registers ?

*byte addressed = lower byte of the register.

phuclv
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    Yes, but only in 64 bit mode. A 64 bit cpu running in 32 bit mode still can't address those parts. The only resource you should care about are the official intel ones: _Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 1: Basic Architecture, section 3.4.1.1 General-Purpose Registers in 64-Bit Mode_. Also, you could have just tried it in an assembler. – Jester Jul 29 '16 at 12:20
  • @jester Thanks jester. I had volume 2 and was looking in that , obviously didn't find any detail on architecture. content of text books differ a lot. –  Jul 29 '16 at 12:44
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    This is one of the few things that a REX prefix with none of the bits set is used for. – harold Jul 29 '16 at 16:25
  • In 64-bit mode *"You can also use the LSB of esi, edi, esp, ebp by the names sil, dil, spl, bpl with the new REX prefix, but you cannot use it at the same time with ah, bh, ch or dh"* [Assembly registers in 64-bit architecture](https://stackoverflow.com/a/20637866/995714) – phuclv May 11 '19 at 03:56
  • Possible duplicate of [Assembly registers in 64-bit architecture](https://stackoverflow.com/questions/20637569/assembly-registers-in-64-bit-architecture) – phuclv May 11 '19 at 03:56

1 Answers1

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In x86 registers are encoded by 3 bits, therefore you can choose among 8 registers for each operand. The set of 16-bit and 32-bit registers in order is

E = { (E)AX, (E)CX, (E)DX, (E)BX, (E)SP, (E)BP, (E)SI, (E)DI }

However when it comes to 8-bit registers the chosen register set was

B = { AL, CL, DL, BL, AH, CH, DH, BH }

As you can see they traded off the ability to address the low bytes of SP, BP, SI, DI which were deemed less useful at the time (seriously, why would you want the low byte of SP or BP?) and replace them with the high bytes of AX, BX, CX, DX instead which also helps translating 8080 assembly to 8086 directly without any rewrite. See Why are first four x86 GPRs named in such unintuitive order? for more explanation

In 32-bit mode more addressing modes were introduced with the advent of the SIB byte. That makes it possible to free the EBP register up for general use, so the low byte of BP may have some useful use, but Intel didn't change the encoding scheme to simplify the decoder, and for backward compatibility

However when AMD extended the ISA to 64-bit they made many breaking changes. There's more bits to address the registers with the use of the REX prefix so now we have 8 more registers. AMD also allows us to address the above registers' low bytes

  • Without REX prefix: use the set B like the old behavior. (The new registers R8-R15 or any of their partial registers aren't accessible at all without a REX prefix)
  • With REX prefix: the set is now B' = { AL, CL, DL, BL, SPL, BPL, SIL, DIL, R8B-R15B }

It's also easy to see why AH/BH/CH/DL cannot be used with REX-prefix, and why you can't mix AH with BPL for example

So the answer to the question

Is this an added feature along with the addition of R8-R15 registers ?

is Yes. It's a new feature in x86-64

Peter Cordes
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phuclv
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