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I'm confused about the RISC-V ABI Register Names. For example, Table 18.2 in the "RISC-V Instruction Set Manual, Volume I: User-Level ISA, Version 2.0" at page 85 specifies that the stack pointer sp is register x14. However, the instruction

addi sp,zero,0

is compiled to 0x00000113 by riscv64-unknown-elf-as (-m32 does not make a difference). In binary:

000000000000 00000 000 00010 0010011
^imm         ^rs1  ^f3 ^rd   ^opcode

So here sp seems to be x2. Then I googled a bit and found the RISC-V Linux User's Manual. This document states that sp is x30.

So what is it? Are there different ABIs? Can I set the ABI with a command line option to riscv64-unknown-elf-*? Is there a comprehensive table somewhere?

Peter Cordes
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CliffordVienna
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1 Answers1

13

The stack pointer is now x2.

Here is the current ABI documentation, which has been moved out of the User-Level ISA specification, which now contains that same link.

The ABI was modified to better accommodate the new RISC-V compressed spec, which puts the 8 most-used registers next to each other in x8-x15.

Note: do not trust ANY non riscv.org webpage. Quan Nguyen makes this clear in his introduction that the "RISC-V Linux User's Manual" is for documenting the porting process and that accuracy is NOT guaranteed.

hexchain
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Chris
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