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Looking at this Intel core i7 nehalem micro-architecture enter image description here

it seems that each core has its own private Register File. So I have a couple of short questions, because I thought that there is only 1 set of registers not dependent on the number of cores.

  • Does each core have its own private set of registers? (RAX, RBX, RSP and so on).
  • Does each core have its own MMU and TLB? Not just one shared across all cores?

I know the questions are highly micro-architecture dependent but I think the majority of modern x64 Intel cpu's follow the same design principle.

Sep Roland
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lychee
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  • Note that the question appears off-topic here: "Questions about general computing hardware and software are off-topic for Stack Overflow unless they directly involve tools used primarily for programming." – njuffa Mar 02 '15 at 17:40
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    @njuffa well registers are related to programming so it is good to know more about them :) – lychee Mar 02 '15 at 17:42
  • While each has it's own registers, the ability to specify which core is set when loading rax, rbx, rsp and so on isn't generically supported. – David C. Rankin Mar 02 '15 at 17:42

2 Answers2

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Each core has its own set of registers, MMU, TLB, level 1 caches (data and instruction), level 2 cache (this depends on processor) etc. Cache Coherency is supported across cores via "QPI" and in the case of high end Core 7 and server-based processors like Xeon, Cache Coherency is supported across processors on a multi-processor mother board by exposing "QPI" on the external pins of those processors (for processors where multi-processor cache coherency is not supported, "QPI" is not "exposed").

Wiki article: Nehalem

peak
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rcgldr
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Yes, each core has its set of registers. "Core" is equivalent of separate CPU on socket but with "multicore" the electronic wiring is simple.

i486
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