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Reading Decoding Z80 Opcodes, There's a section about the 0xDD prefix. This instruction prefix causes the next instruction to use the IX register instead of the HL register. That makes sense. HL and IX (also IY) are designed for holding pointers. That's why there's such an efficient encoding for (HL) (called M in Intel's parlance). This question is also about the 0xFD instruction prefix which does the same but for IY.

Anyway, there's this comment about prefix 0xDD in particular:

If the next opcode makes use of HL, H, L, but not (HL), any occurrence of these will be replaced by IX, IXH, IXL respectively. An exception of this is EX DE, HL which is unaffected.

I think it's weird that EX DE, HL is unaffected by this instruction prefix. I can see the utility of being able to efficiently switch pointers around. So has this been "special-cased" somehow to remove the possibility of exchange DE with the index registers?

Omar and Lorraine
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1 Answers1

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Simply because these registers are not exchanged, but renamed (*1).

All EX DE,HL does is toggle a flip-flop which decides which is HL and which is DE.

Much the same way the exchange for alternate AF (EX AF,AF') or alternate register (EXX) set is done. It's also the reason why all of them can be done in just 4 cycles — toggling either flip-flop does not need any data transfer.

*1 - I have a vague feeling I did already explain that as part of some question about the register set, but can't find it right now.

Omar and Lorraine
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Raffzahn
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  • Your answer implies there is no hardware provision for renaming DE to IX – Omar and Lorraine Oct 13 '20 at 09:36
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    Of course not, that would be overly complex. each EX variation controls a single FF - including a double rename would require 3 of them just for DE/HL/IX and result in an undefined state at power up. Way overkill for a function just to be added to make some instruction set symmetry - if that would be one intended at all, since the prefix is about replacing a source/destination register in a transfer, but EX does not do any transfer. – Raffzahn Oct 13 '20 at 10:01
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    Hmmm... does EXX bring back the previous state of the DE/HL flip-flop as well then? – TeaRex Oct 13 '20 at 10:50
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    @TeaRex Each set has it's own FF – Raffzahn Oct 13 '20 at 10:56
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    You may consult Ken Shirrif's blog entry on the implementation of the Z80 register. It goes down to the level of the transistor but at the beginning he explains it in a overview mode which might clarify how the flip-flops Raffzahn mentioned function. One thing to get from that article is that the physical layout of the registers does not reflect the register overview one gets in assembly tutorials. The physical layout explains what operation are possible and why. http://www.righto.com/2014/10/how-z80s-registers-are-implemented-down.html – Patrick Schlüter Oct 13 '20 at 10:59
  • @PatrickSchlüter: I wonder how the cost of the DE/HL latch compares with what it would have cost to output DE and input WZ during the first cycle of the instruction following an "ex de,hl", then output HL and input DE, then output WZ and input HL? Given the split bus design, I think all three parts of the exchange could take place during the opcode fetch and "refresh" cycle, and the approach would have been easily extensible to add a two-byte 16-bit register move that could operate on prime as well as "ordinary" registers. – supercat Oct 13 '20 at 16:47