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I have ethernet differential signals and a discrete magnetics part.

I want to know what issues might arise if I place vias on the differential signals when connecting them between the magnetics and the ethernet PHY?

Can someone explain in simple terms?

Freshman
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  • @Justme, thank you for the comment. I checked. So, vias should not a cause a problem for the ethernet diff signals. Thank you – Freshman Sep 28 '23 at 06:02
  • No you understood wrong. Vias can cause problems to any high speed signal, as said in all high speed design guides. – Justme Sep 28 '23 at 06:07
  • @Justme, but for ethernet? They say that the edge rate for the interface is the determining factor for the issue, right? Could you tell me how to calculate the edge rate of ethernet and how will it be determined if it will cause problems or not? – Freshman Sep 28 '23 at 06:24
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    The allowable edge rates for Ethernet will be in the standard. Also other requirements for how much and in which way the transmission line (i.e. wiring, including PCB) is allowed to degrade and distort the signal. If you consider the specifications and how to meet them, so in simple terms, just avoid vias like everyone tells you to avoid vias, and if you can't avoid them, use them with extreme caution. Designing vias is same as designing differential pairs - it has to be done correctly or you don't have correct impedance. – Justme Sep 28 '23 at 06:39
  • Just for reference: GbE signalling is 8 nS per symbol (4D PAM5). The typical edge rate (from mask fit for testing) is 3.6 nS. – Peter Smith Sep 28 '23 at 06:51
  • It's funny that people put so much concern on Ethernet, as if it were a high speed system; it is, in very general terms, but with regards to PCB-scale elements, it really doesn't care. Vias are a concern with ps scale edges. – Tim Williams Sep 28 '23 at 14:07

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