For high speed signals where ωL>>R for the transmission line, the return current becomes concentrated close to the wave guide which is the PCB track. The return path for this current shall be in the GND. My question is, what is the significance of using PWR as return path instead of GND? Is this possible? What will happen with high speed signal in this case?
The PWR plane in this case will be connected to PWR of the transmitter and receiver ICs.
Yes, you can use a PWR plane as the reference for a high speed line.
The important thing is to make sure it's decoupled, that is shorted at AC by a small capacitor, to the reference terminal of any other port on that line at the point where the return current needs to flow to the port reference, usually GND.
If the line is going between ICs for instance, then that happens more or less automatically if each IC has its PWR plane decoupled to the GND plane close to the IC.
(edit) In your question you state
The PWR plane in this case will be connected to PWR of the transmitter and receiver ICs.
Yes, of course it will. The DC current to the device will flow through that route. But that's not where the AC component of the return signal current flows. The return signal current has to flow to the 'return signal current pin' of the device, which is almost always the ground pin of the device, or in devices that have multiple ground pins, the pin that's physically closest to the signal pin. Many high frequency ICs have a pair of ground pins, one either side of the signal pin, to be used for that purpose.
The signal return pin or pins should be connected to a local ground conductor that forms the 'impedance defining ground plane' (IDGP) of the signal trace. If later on, you want to switch that plane to the PWR plane, then you have to stitch the PWR plane to IDGP with one or more tiny ceramic capacitors to allow the return current to flow between the planes at their transition.
While excess length and so excess series inductance is just as important to avoid in this transition as it would be in a signal trace, the ability to use additional caps and paths in parallel comes to your aid when connecting this current. As ever, this is easier at lower frequencies.
Just as you need to avoid excess length and inductance, you also need to avoid excess width and capacitance. If the line runs for any length with both the former IDGP and the PWR plane in proximity to the line, perhaps one above and one below, the excess capacitance will lower the line impedance at that point, and cause a discontinuity.
The former two paragraphs are just saying emphasising that if good line impedance is required, then any junctions between different physical media have to be designed.
It may be possible to dispense with the notion of an IGDP altogether, and use capacitors from the adjacent signal return ground pins directly to the PWR plane, and configure the signal trace / PWR plane dimensions to give your required line impedance. If the signal is very high frequency, then you may have to design the physical sizes of these capacitors and their pads, perhaps treating them as elements of CPWG (CoPlanar WaveGuide), to get a good enough transition.
Summary - you can use any conductor on the board as a return conductor to define the impedance of a signal line. However, you need to design all of the transitions between source and sink of the signal path to have that design impedance. This is easier if that return conductor is the GND plane throughout. (/edit)
