Digital Logic Design

Question

Consider the circuit diagram below. What will happen if at some instant the inverter input is zero?

I think oscillation is unlikely with just one inverter, but we really need to know what happens after "some instant"...is the input floating, driven to 0 with low impedance, driven to 0 with high impedance? — Elliot Alderson, Jul 10 '19 at 21:04

user3795717 · Answer 1 · 2019-07-11T02:38:10.163

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It will become stable halfway between low and high because in that area the gate behaves like an amplifier. However, you can make this oscillate if you implement a full CMOS schmitt trigger instead of a regular NOT gate.

http://web.mit.edu/magic/Public/papers/00260219.pdf

edited Jul 11 '19 at 02:38

answered Jul 11 '19 at 02:32

user3795717

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hacktastical · Answer 2 · 2019-07-11T08:55:48.567

If the signal pulling the input is strong enough (and the statement "at some instant is zero" implies this), both input and output will be low, because they're connected by a dead short.

Meanwhile, the inverter output will be trying to pull the output high (sourcing current). But because its drive is limited, it will still be low, by the same “at some instant“ definition given above.

This is how a real inverter would actually behave.

Digital Logic Design

2 Answers2